Low Power Design Techniques for Digital Logic Circuits.
Thesis
Xia, Y. Low Power Design Techniques for Digital Logic Circuits. (Thesis)
Edinburgh Napier University. Retrieved from http://researchrepository.napier.ac.uk/id/eprint/6887
With the rapid increase in the density and the size of chips and systems, area and power dissipation
become critical concern in Very Large Scale Integrated (VLSI) circuit desi...